Intel's 12" test wafer with SRAM using 22nm technology
Intel widens its lead in semiconductor technology
Once again, Intel is putting distance between themselves and the rest of the industry when it comes to semiconductor technology. During the keynote at the Intel Developer Forum, CEO Paul Otellini disclosed that Intel has shipped over 200 million CPUs that use the company’s high-K dielectric material and metal gates. This technology was introduced at the 45nm process node, and Intel continued to refine this low-leakage technology in the production-ready 32nm process. While it is still a year-and-a-half away from production, Intel’s public viewing of a 22nm test wafer was meant to validate their contention that Moore’s Law is alive and well.
Intel’s production volume is moving to 32nm
Intel is clearly ready to ramp up 32nm and explained that they have four factories running 32nm products (two in Oregon, one in New Mexico, and one in Arizona). There are also three factories running 45nm products, so Intel has a staggering amount of semiconductor capacity. The move to 22nm will allow even lower voltages (and power) on products that cram even more transistors into a single die. In spite of the constant prediction that Moore’s Law will run out of gas, Intel’s schedule for 22nm seems to offer another data point to plot on Dr. Moore’s famous graph — at least as it relates to transistor count. Intel long ago dropped any pretense about staying on a similar graph for transistor speed.
What is on this 22nm wafer?
Almost all semiconductor process technology is tested using SRAM cells. An SRAM has the advantage of being a structure that is uniform and easily tested to find complex problems that manifest themselves in any new semiconductor process technology. Intel’s wafer contains SRAM chips with 364 Mbits of storage. Each of these chips also contains some test logic and even some mixed-signal (analog) functions. In total, each die contains over 2.9 billion transistors, which is extremely large for a test chip.
Shuttle wafers allow mixing and matching of die
Only a chip person would appreciate the distinction, but Intel mentioned that the test wafer uses a “shuttle” approach. Instead of a wafer where every die is identical, the mask set for the wafer can include lots of variations. When you have a 12-inch wafer that holds a lot of die locations (and likely costs a fortune to fabricate for each experiment), it makes sense to use the same wafer for multiple die revisions.
CPU versus SOC process lines
Intel has bifurcated its process technology into high-performance (CPU) and low-leakage (SOC) process technologies. The terminology is a little misleading, since Intel confirmed that “CPU” doesn’t include the Atom microarchitecture. All Atom products will run on the low-leakage process, though it sounds like Intel believes that Atom is going to inhabit a world of SOCs that are specialized for specific markets.
What’s next for Intel’s process technology?
It looks like the next process node will be 15nm. At that point, Intel expects that the equipment will be also ready for the move to 18-inch wafers. I don’t know what we’re going to do with all those transistors, but jump on the forum at Improbable Insights to share your opinions…
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8 comments
Markeyse
September 22, 2009 at 6:07 pm (UTC -7)
Excitement comes to mind when thinking about these things. So much for getting 45nm chips. If the cost is right, I will get a 32nm chip. And 22nm. Wow Intel! When will the madness stop?
Jason
September 22, 2009 at 9:11 pm (UTC -7)
Thought I read somehwere that once the scale got into the teens for mfg that this is when they would finally hit the wall for the current methods used. Is this true or are we going to see stuff like 9nm CPU’s in the somewhat near future.
hdmi
September 23, 2009 at 2:22 am (UTC -7)
I read this article somewhere else about intel. I am using a intel processor but don’t know anything about intel semiconductor technology but now i am understand what this technology means.
Scott
September 23, 2009 at 10:09 am (UTC -7)
Guys, there wasn’t much detail about process technology, since IDF continues to mutate into a focus on applications and markets. In other Intel presentations (at places like Microprocessor Forum), they’ve discussed the limitations of using bulk semiconductor process technology as the geometries approach nanometer scales. I suspect that Intel will talk more about the difficulties of 22nm once they get closer to production.
Personally, I’m a little surprised that Intel was able to push into such small geometries with just a change in materials. They seem confident of the move to 15nm as well. We all suspect that the chip guys will hit a wall, but we just keep adjusting the point at which that will occur…
Scott
Markeyse
September 24, 2009 at 3:15 am (UTC -7)
Yea. It seems like Intel keeps pushing them out. That is why they are number one right now. AMD got to cocky in the Athlon days, and Intel was like ok, we have something for you.
Scott
September 24, 2009 at 9:37 am (UTC -7)
Intel gave a little more detail on process technology at another IDF session last night. Let me know if you guys are interested in this topic, and I’ll post more analysis. One thing I should have discussed in this article is Intel’s ability to reduce transistor leakage in a smaller process. This actually goes against the trend that we’d seen before, since many factors contribute to higher leakage.
I wrote about the leakage issue in an older ExtremeTech article (http://www.extremetech.com/article2/0,2845,1860875,00.asp) that should be very interesting in light of the new process improvements. Again, let me know if this topic merits more discussion, and I’d be happy to contribute more content to Loyd’s site.
Scott
Craig
September 24, 2009 at 2:04 pm (UTC -7)
I for one would like more info and would ask if it would be possible to have a running series of articles on what goes into manufacturing a cpu – the components, how they work together, and the challenges that need to be overcome. Thanks.
Craig
Scott
September 24, 2009 at 3:49 pm (UTC -7)
Craig, sure, I’ll keep posting and try to go a little deeper into the CPU stuff. There are some older articles on ExtremeTech that are still pretty relevant. Ziff Davis will keep the site going, since some of those articles still get quite a few hits. I was even surprised to find that a few of my articles ended up being turned into university course material. Obviously, Loyd has a ton of great content over there as well. To find me, just do a search for “gardner” on the ET site.
Scott